JPH01174929U - - Google Patents
Info
- Publication number
- JPH01174929U JPH01174929U JP7254288U JP7254288U JPH01174929U JP H01174929 U JPH01174929 U JP H01174929U JP 7254288 U JP7254288 U JP 7254288U JP 7254288 U JP7254288 U JP 7254288U JP H01174929 U JPH01174929 U JP H01174929U
- Authority
- JP
- Japan
- Prior art keywords
- test
- address
- data
- circuit element
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7254288U JPH01174929U (en]) | 1988-05-31 | 1988-05-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7254288U JPH01174929U (en]) | 1988-05-31 | 1988-05-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01174929U true JPH01174929U (en]) | 1989-12-13 |
Family
ID=31297701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7254288U Pending JPH01174929U (en]) | 1988-05-31 | 1988-05-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01174929U (en]) |
-
1988
- 1988-05-31 JP JP7254288U patent/JPH01174929U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0365023A3 (en) | Address control circuit for data memory employed in signal delay circuit | |
| JPH11203896A (ja) | 同時カラム選択ライン活性化回路を具備する半導体メモリ装置及びカラム選択ライン制御方法 | |
| JPH01174929U (en]) | ||
| JPH0365745A (ja) | Ｉｃカード | |
| JPH0350255U (en]) | ||
| JPH0323894U (en]) | ||
| JPS59134842U (ja) | 車載電子機器用のワンチツプマイコンのメモリ拡張装置 | |
| JP2915707B2 (ja) | ダイナミックｒａｍ | |
| JPH02123799U (en]) | ||
| JPH022751U (en]) | ||
| JPS6020099U (ja) | Ｐ−ｒｏｍ書込器 | |
| JPS5859386U (ja) | 相順切替え装置 | |
| JPS58114596U (ja) | 半導体メモリ装置 | |
| JPH0166697U (en]) | ||
| JPS6232818B2 (en]) | ||
| JPH0284950U (en]) | ||
| JPH025293A (ja) | 半導体メモリ | |
| JPH026344U (en]) | ||
| JPH0185999U (en]) | ||
| JPH10161929A (ja) | 電子装置 | |
| JPS60131056U (ja) | メモリ内蔵形ｌｓｉ | |
| JPS593385U (ja) | 信号処理回路 | |
| JPS6074300U (ja) | 電気的に消去可能なプログラマブル読出し専用メモリ | |
| JPS6044298U (ja) | メモリ書込み回路 | |
| JPS6047056U (ja) | プログラマブル・コントロ−ラの入力装置 |